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Maxim >
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High-Frequency ASICs
Fiber
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Circuit Design Examples
Maxim respects non-disclosure agreements with its ASIC customers. Because of the uniqueness and proprietary nature of ASICs, only a limited number of circuits are available for disclosure. The following examples refer to some of our leading-edge standard products and demonstrate Maxim's expertise in the development of fiber ASICs.
2.5Gbps, Low-Power, +3.3V or +5V Clock-Recovery and Data Retiming IC This IC contains a fully integrated phase-locked loop. No external tuning devices are used. Maxim's on-die trimming capability makes this product truly "plug 'n play."

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2.5Gbps, +3V, SDH/SONET 4-Channel Concentrator and Clock Generator This IC is a 4:1 multiplexer and 4:1 demultiplexer with automatic channel alignment. The mux receives four parallel 622Mbps SDH/SONET channels. These channels are bit-interleaved to generate a serial data stream of 2.488Gbps. A 10-bit-wide elastic buffer tolerates up to +/-6ns skew between any parallel data input and the external 155MHz reference clock. An on-chip 2.488GHz PLL is used for timing the outgoing data stream.
The demux receives 2.488Gbps serial data and the 2.488GHz clock from an external clock/data recovery device, converting it to four 622Mbps LVDS data outputs with clock. An internal frame detector looks for a 622Mbps SDH/SONET framing pattern and rolls the demux to properly align the channels at the output.
These devices also include an embedded pattern generator that enables a full-speed built-in self test (BIST). Two different loopback modes provide system test flexibility.

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A 9.9G to 10.8Gbps Rate-Adaptive Clock and Data Recovery with No External Reference Clock for WDM Optical-Fiber Transmission This IC contains a fully integrated phase-locked loop. No external tuning devices are used. Design meets SONET specifications over 1 Ghz range.

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First Quad 3.2Gbps Adaptive Cable Equalizer/Driver The MAX3802 has four independent adaptive cable equalizers and cable drivers on a single chip. It is designed for coaxial and twin-axial cable point-to-point scrambled-data communication applications. The driver features differential current-mode logic (CML) inputs and outputs. The equalizer includes differential CML data inputs and outputs and a TTL loss-of-signal (LOS) output.
The adaptive cable equalizer can equalize differential or single-ended signals at data rates up to 3.2Gbps. It automatically adjusts to attenuation caused by skin effect losses of 30dB at 1.6GHz. The equalizer effectively extends the usable length of copper cable in high-frequency interconnect applications.

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